1. Field of the Invention
The present invention relates to packaging for micro-electromechanical systems (MEMS) devices. More specifically, the present invention relates to packaging of MEMS devices in flip-chip bonded geometry to provide hermetic seals for the MEMS devices.
2. Description of the Related Art
MEMS devices have become ubiquitous in the semiconductor industry and are used in hybrid electrical and mechanical functions that are necessary in many electronic and electro-optical systems. Packaging MEMS devices in such systems is in general a costly process. Because mechanical motion is an essential part of the MEMS function, a carefully designed space for the motion is needed in order for the MEMS device to operate reliably. Conventional packaging techniques used for CMOS electronics are performed after the CMOS devices are appropriately protected using proper passivation material. Such passivation procedure protects the devices from the packaging processes that are usually mechanically and chemically harsh. After device passivation, packaging is performed by injecting either molten plastic or epoxy over the CMOS chip. Since the CMOS function relies purely on the electronic properties of silicon, such a packaging process does not interfere with device performance. However, these packaging techniques usually involve treatment of semiconductor chips using a fluid, and are therefore not compatible with MEMS device operation. For this reason, expensive ceramic packaging has usually been chosen over cost-effective plastic molded packages for MEMS devices.
Most MEMS devices need to operate in a controlled environment to achieve optimum device performance and reliability. Some examples of controlled environments include controlled pressure (vacuum), controlled humidity, and controlled chemical (typically a special gas) environments. Packaging MEMS devices cost-effectively under these conditions is desired in the art, but due to the complexities and sensitivities associated with operation environments of MEMS devices it is often a difficult or impractical task.
It is also essential that such cost-effective MEMS packaging technology be compatible with CMOS packaging technology. This is important because CMOS technology is already mature and commercially available. Moreover, the need to integrate MEMS devices with CMOS technology is becoming increasingly important in order to add functionality to the CMOS chip that simple CMOS devices cannot provide, and to provide control of MEMS devices using CMOS integrated circuits. Most CMOS packaging techniques wherein wet chemistry and high-pressure fluid flows are used, however, are detrimental to MEMS devices. Thus, current CMOS packaging techniques will not adequately protect the MEMS devices during the packaging process.
Accordingly, there is a long-felt, but unresolved need in the art for MEMS packaging techniques which hermetically seal the MEMS devices so that they can effectively be incorporated in CMOS and other hybrid circuits. The packages should be cost-effective and ensure that electrical connections to or with the MEMS devices can be achieved without breaching the integrity of the package. Moreover, such packages should be easily integratable with current semiconductor fabrication processes and be compatible with conventional CMOS packaging methods.
The present invention provides a novel packaging technique that enables conventional CMOS packaging procedures be used to package MEMS devices. It also provides means to control the operation environment of the MEMS devices at the same time. The inventive packages produce a protected cavity around the MEMS devices which is created by a a flip-chip bonding process. In a preferred embodiment, a firewall is fabricated on a first substrate around the MEMS device to enclose the MEMS device within the cavity bounded by the firewall. Another substrate is then flip-chip bonded to the first substrate that holds the MEMS device. This second substrate may hold other MEMS devices to complete the structure or functionality of the overall hybrid circuit, may hold CMOS electronics to control the MEMS device(s) on the first and/or second substrate, or may serve purely as a mechanical xe2x80x9ccoverxe2x80x9d of the MEMS device firewall. A gap between the two substrates is accurately controlled by the height of the firewall itself, by spacers of known height, or with spacers in conjunction with the height of the firewall. The spacers can be fabricated independently on the substrate, in which case they will not form a portion of the firewall per se. In a preferred embodiment, the cavity is hermetic, which means that the cavity is sealed against the environment of the package to protect the MEMS device from any deleterious conditions found or present in the environment of the package.
Upon flip-chip bonding of the two substrates, the firewall seals off the space immediately around the MEMS device(s). At the same time, mechanical support and integrity is provided for the package by the bonded substrates through appropriate bonding techniques. In still a further preferred embodiment, the hermetic firewall itself provides the mechanical support for the package. Still more preferably, independent structures are provided to the package to give the package its additional mechanical support. Once the cavity has been created by the firewall and the MEMS device is protected accordingly, the hybrid chip containing the MEMS device in its package can be further packaged using conventional CMOS packaging technology.
The inventive packages for MEMS devices are simple to implement and can easily be performed with conventional CMOS packaging technology. Moreover, packages provided in accordance with the present invention may hermetically seal MEMS devices from deleterious effects found in a packaging environment which could damage the MEMS devices. Thus, the packages disclosed and claimed herein efficiently protect MEMS devices so that these devices can function robustly when in use.
These and other features of the present invention will become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims.
Other objects and features of the present invention will become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims. It should be further understood that the drawings are not necessarily drawn to scale and that, unless otherwise indicated, they are merely intended to conceptually illustrate the structures and procedures described herein.